module sum #(parameter no_bits = 8) ( input sel_op, input [no_bits-1:0] sum1, sum2, output reg [no_bits-1:0] res ); always @(sel_op or sum1 or sum2) begin if (sel_op) res = sum1 + sum2; // asignaciĆ³n procedural else res = sum1 - sum2; // asignaciĆ³n procedural end endmodule // sum